Sequencing step control

ABSTRACT

A control for varying loads such as heating elements in response to a change in an environmental variable such as temperature in which the first load to be energized is always the first load to be de-energized and the last load to be energized is always the last load to be de-energized.

United States Patent 1191 Bennett Jan. 22, 1974 [54] SEQUENCING STEPCONTROL 3,529,173 9/1970 Verma 307/41 I 3,586,869 6/1971 Kompelien307/41 [75] Charles name, Alderwood 3,351,739 11 1967 Eckman 219/486 xManor wash 3,489,882 l/1970 Krackow 219/486 [73] Assignee: CamIndustries, Inc., Kent, Wash.

Primary ExaminerHerman J. Hohauser [22] Flled: July 1972 AssistantExaminer-M. Ginsburg [211 App], 271 22 Attorney, Agent, or FirmRichardW. Seed et al.

52 us. Cl 307/41 307/117, 219/486 [57] ABSTRACT [51] Int. Cl. H0511 1/02A-control r v ry g l d such as ting nts [58] in response to a change inan environmental variable Field of Search 307/41, 117; 219/480, 486,219/483, 487

such as temperature in which the first load to be energized is alwaysthe first load to be de-energized and [56] References Cit d the lastload to be energized is always the last load to UNITED STATES PATENTS bede-energlzed- 3,496,337 2/1970 Vogelsonger 219/486 4 Claims, 6 DrawingFigures v 110 500 "UP" SHIFT VAC '3 l2 REGISTER 24 5 SET ""1 i H HIGHPOINT IN I I l| FREQUENCY H 22 R: 1 DIFFERENCE COUPLING TRIAC T SUMMINGu 1 fi cIRcuITs cIRcuITs ourPuTs 46 SCALING I5 I 24b 540 +v 10-AMPLIFlER l6 6 22 22b 25 320 X F t H l4 Q PULSE e GATE 8 2 17 ERRoRDRIVER C R E T M- 39/ 541 412 44 SlGNAL PA A 141: DC. TORS' 8 HIGH 2728b 6 FREQUENCY 4c PULSE 2 b CLOCK e, GATE 8 280A (aacl 20 20a l6bDRIVER l I I I l 2611 ll ze f 2s I I l I46 CONTACTORS BOlLER DETERMINING"DOWN"SHIFT 473E 1511 J 50 CIRCUI REGISTER IWHTL 3011 I 7 30 30b Id li531 TIMING a w 1"1 ZERO CROSS RECYCLE P i ivv cIRcuIT OR I |-1 I L .J 7

30b START-UP I I 5| cIRcuIT THER- 3'2 320. 48- MOST T IPATENTEDJAHZZIEIM SHEET 2 0F 5 VIC SUMMING 8 SCALING AMPLIFIER CURRENTLIMIT DETERMINING CIRCUITS TEMP. OR PRESSURE in m n FIG IAPATENTEDJANZZXHM FIG, 2

x= ENERGIZED SEQUENCING STEP CONTROL BACKGROUND OF THE INVENTION 1.Field of the Invention This invention relates to the control of aplurality of loads in response to variations in one or more conditionsto be controlled. Particularly the invention is related to selectivelyvarying the order or sequence of energization and de-energization of theloads in response to the varying conditions.

2. Description of the Prior Art Numerous types of controls have beenheretofore employed to energize or de-energize a load or loads inresponse to a varying condition. Some of thses devices areelectromechanical in operation, using some form of stepping switch whichenergizes the loads sequentially according to the demand indicated bythe varying condition. De-energization of the load followed the reverseoperation of the stepping switch. As a result, those loads coupled tothe first few contacts of the stepping switch were in use substantiallylonger than loads further along in the sequence. 7

U.S Pat. No. 3,529,173 illustrates a concept in which the loads areenergized in timed sequence in an attempt to equalize the energizationtime of the loads. While this system is somewhat effective indistributing the demand over the available loads, it requires manualadvancement of a rotary switch and thus the equilization of the demandon the various loads becomes dependent upon human judgment, oftenresulting in improper sequencing of the loads.-

7 SUMMARY OF THE INVENTION It is an object of this invention to providean improved control system for varying loads in response to a change inan environmental variable in which the loads are energized andde-energized on a first-on, firstoff basis.

It is another object of this invention to provide an improved controlsystem for varying loads which automatically distributes the demandsequentially over all of the available loads without preference to anyof the loads.

It is another object of this invention to provide an inexpensive,solid-state control for distributing over a plurality of loads, a demandcaused by a change in an environmental variable.

Basically the invention employs means for sensing a change in anenvironmental variable, a plurality of loads for changing theenvironmental variable, and sequencing means responsive to said sensingmeans for automatically selectively energizing and de-energizing saidloads on a fiI'SIOI'I, first-off basis. In the preferred form two solidstate shift registers are respectively energized by increases anddecreases in the sensed change of the environmental variable from a setnorm with the outputs from the shift registers being progressively orsequentially coupled to a series of gates which are operative toenergize and de-energize a series of loads. Increases in demand shift apulse through the first shift register to energize the loadssequentially whereas decreases in the variable shifts a pulse throughtthe other shift register to tile-energize the loads in the same order asthey were energized in the first shifts register.

The environmental variable can be pressure, temperature, humidity, etc.correspondingly, the loads can be generators, air conditioning units,heating elements, pumps, etc.

BRIEF DESCRIPTION OF THE FIGURES OF THE DRAWING FIG. 2 is a diagrammaticchart illustrating the resulting progressive sequential operation of thepreferred embodiment.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The preferred embodiment of theinvention will be described herein with reference to a boiler controlsystem where the environmental variable is the boiler temperature andthe loads are a series of electrical heating coils. Referring now toFIG. I, the desired boiler temperature is established by some type ofautomatically or manually established set point such as potentiometer11. The output of the set point potentiometer 11 is a voltage indicativeof the desired boiler temperature.

The actual boiler temperature is derived from a thermostat 51 located atsome appropriate point within the boiler. The voltage output fromthermostat 51 is indicative of the present temperature of the boilerunder control and is fed to some type ofcomparator such as differentialamplifier 13. The other input to differential amplifier 13 is thevoltage signal from the set point potentiometer 11 so that the output ofamplifier 13 is a signal indicative of the difference between thedesired temperature and the actual boiler temperature.

For the purposes of the present explanation it will suffice to say thatthe boiler temperature will generally be at some level below the desiredtemperature so that the voltage output of the differential amplifier 13will represent the need for some quantity of additional power to theboiler. This voltage signal is then proportional to temperature errorand as such indicates the amount of power which must be supplied to theboiler.

The actual power input to the boiler is sensed in some fashion such as acurrent transformer 47 located in the main power lines feeding theheating coils in the boiler. The signal from current transformer 47 willbe an A.C. voltage porportional to the present power being fed to theboiler. This voltage is fed to a DC. current signal circuit 14 (shown indetail in FIG. 1A) where it is converted to a DC. voltage proportionalto present power consumption.

The required amount of power is thus indicated by the output ofamplifier 13. This signal is fed to a summing and scaling amplifier 10.The other input to summing and scaling amplifier 10 is the output of thecurrent sensing circuit 14 which is proportional to the actual powerbeing supplied to the boiler. Thus, the amplifier 10 operates todetermine whether more or less power input to the boiler is required.This signal is fed via line 15 to the error comparators 16.

The error comparator circuit 16 is shown in detail in FIG. 18. For thepresent it suffices to say that error comparator 16 functions to examinethe output of amplifier 10. If this output indicates that more power tothe boiler is required there will be a signal on output line 160. Ifless power is needed then there will be a signal on output line 16b.

The two output signals from error comparator circuit 16 are fed to twopulse gate and driver circuits 22, 26 which are shown in detail in FIG.1B. Briefly, pulse gate and driver 22 is connected to error comparator16 via line 16a. When there is an output present on-line 16a, pulse gateand driver circuit 22 operates to generate a pulse of the appropriateduration andat the appropriate time in the sequence. The timing functionis accomplished by virtue of a connection via line 30a to a timing andzero cross circuit 30 which will be explained in greater detailhereinafter.

Similarly, pulse gate and driver circuit 26 is connected to output line16b of the error comparator l6. Pulse gateand driver circuit 26 operatesto generate an appropriate pulse when there is a signal present onoutput line 16b.. The output of pulse gate and driver circuit 22 isconnected via line 22a to the shift input terminal of a shift register24. Shift register 24 may be constructed in several fashions and in thepreferred embodiment it is connected to form a twisted ring register.For the purposes of'explanation it will-be assumed thatthere are threeinput terminals, IN, SHIFT, and CLEAR. The shift register 24 has aplurality of sections (eight as shown for simplicity). There is anoutput terminal associated with each section. As is well known, a pulseon the SHIFT input will shift the logic signal present at the INterminal tothe first section and shift the contents of all sections tothe next adjacent section. Thus, if there is a logic one (or high) onthe IN terminal, a pulse on the SHIFT terminalwill fset the first stageof the register and cause its output to assume a logic one (or high")level. The IN terminal of shift register 24 is connected 'to the outputof an inverter 25. The input to inverter 25 is connected to the outputof the final stage of shift regtster 24 to forma twisted ring register.Assume that all stages of the register begin in the reset or clearstate. The output of the final stage is thus a logic zero (or low) sothat the output of inverter 25 is a logic one. The first pulse on theSHIFT terminal sets the first stage of the register by shifting thelogic one on the IN terminal into that stage. The next pulse on theSHIFT terminal shifts the logic one from the first stage of the registerto the second stage and shifts the logic one from the IN terminal to thefirst stage. Operation continues in this fashion until all eight stagesare in the set state.

When the last section of the shift register 24 assumes the set state itsoutput becomes a logic one, changing the output of inverter 25 to alogic zero. Since there is now a logic zero on the IN terminal the nextpulse on the SHIFT terminal causes the first stage to reset. Operationcontinues in this fashion until all stages are reset. In summary then itcan be seen that shift register 24 reacts to a series of pulses on theSHIFT input terminal by successively setting the stages of the registeruntil all are set and then successively resetting all stages until allare reset and so forth. Finally, the CLEAR input termirial operates toautomatically clear or reset all stages of the register regardless oftheir present state.

A second shift register 28 has its SHIFT input terminal connected topulse gate and drivercircuit 26 via line 26a and its IN terminalconnected to the output of 1 low).

inverter 27. It is identical in construction and operation to shiftregister 24 as explained above.

The stages of the shift registers 24, 28 are individually connected todifference circuits 39. That is, the first stage of shift register 24and the first stage of shift register 28 are both connected to a firstdifference circuit composed of an exclusive OR gate 39a; Similarly thesecond stages of both are connected to a second difference circuitcomposed of exclusive OR gate 3%. It is the unique connection of the twoshift registers 24,

28 to these exclusive OR gates that enables the present invention tosequentially activate the heating elements and then de-energize them ona first-on first-off basis.

The functions of the two shift registers 24, 28 and the differencecircuits 39 is readily apparent when one recalls the logic operation ofan exclusive OR gate. That is, if either input is at a predeterminedlogic level (logic one, high or whatever) then its output assumes thatlogic level. If, however, both inputs are at that logic level (logicone) then the output assumes the opposite logic level (logic zero).Similarly, if neither input is at logic one or high, then the output isat logic zero (or Before showing in detail precisely how the presentinvention operates to sequentially activate the heating elements on afirst-on first-off basis, the remainder of the block diagram leading toactivation of the heating elements in the boiler will be brieflyexplained. Each difference circuit is connected to a high frequencycoupling circuit 42 to individually activate an associated triac. Thetriacs 44 in turn energize contactors 48 which individually supply powerto the heating elements 53a in the boiler 50. For simplicity it sufficesto say that an output from one of the difference circuits 39 willultimately result in energization of its associated heating element,there being one heating element associated with each difference circuit.

Referring in combination then to FIG. 1 and FIG. 2 the operation of thecontrol system of the present invention will be explained in somewhatgreater detail. The upper portion of FIG. 2 shows a hypothetical exampleof POWER REQUIRED for an exemplary operating cycle of the boiler beingcontrolled. The power requirement beings at zero and rises steadily to apercent power requirement at point a. Assume that there are ten heatingelements in the boiler under control so that each is capable ofsupplying 10 percent of the total power capabilities of the boiler.

When the power requirement reaches 10 percent the input signal to errorcomparator 16 will rise to a level such that there will be an output online 16a indicating the need to increase power input by 10 percent (orone step of the control system). This results in an appropriately timedpulse being generated by pulse gate and driver circuit 22. This pulse isrelayed via line 22a to the SHIFT input terminal of shift register 24.Assuming that all stages of both shift registers begin in the resetstate, the first stage of shift register 24 will set generating a logicone (or High) on output terminal 24a. Output terminal 24a is connectedto exclusive OR gate 39a along with output terminal 28a from shiftregister 28. Since only one of the inputs to exclusive OR gate 39a is atlogic one, its output will assume the logic one state and thisultimately results in the energization of the first heating element 53athus supplying the required 10 percent power to the boiler.

Assumenow that the power requirementcontinues to rise to percent. Atthis point the sequence repeats itself to the extent of a pulse beinggenerated by pulse gate and driver circuit 22. When this pulse is fed toshift register 24, the second stage thereof assumes the set state andultimately energizes the second heating element 53b via exclusive ORgate 39b and its associated coupling circuit, triac, and contactor.Continuing in this fashion as power requirements rise to 60 percent itcan be seen that the first six heating elements will be sequentiallyenergized by the time the 60 percent power requirement at point a isreached.

At this point in the cycle power requirements begin to decline untilonly 40 percent of power is required at point 11. Prior art controlsystems would handle the decrease to 40 percent by de-energizing thelast two heating elements activated (i.e. steps 5 and 6). The result ofthis conventional approach is to maximize use (and therefore wear) onthe contractors and heating elements associated with the initial stepsand unevenly distribute the load between the elements. The presentinvention, however, handles this decrease in power requirements byde-energizing the first heating element previously energized, i.e. stepone.

This unique and importantfeature of the present invention isaccomplished as follows. When power requirement declines from 60 percentto 50 percent the output of summing and 'scaling'a mplifier l0 reversespolarity to indicate to the error comparator circuit 16 that a decreasein power is required. The result is an output signal on line 1612 whichin turn results in a pulse from pulse gate and driver circuit 26. Thispulse is relayed via line 26a to the SHIFT input terminal of shiftregister 28 so that the first stage of shift register 28 assumesthe setstate. At this point the first stages of both shift registers 24, 28 arein the set state so that both inputs to exclusive OR gate 39a are now atlogic one. Under these circumstances the output of gate 39a reverts tologic zero-which ultimately de-energizes the first heating element 53a.Similarly, as the required power drops to 40 percent, a second pulse isgenerated by pulse gate and driver circuit 26. This sets the secondstage of shift register 28 and de-energizes the second heating element.

The remainder of FIG. 2 is self-explanatory as power requirementincreases to 90 percent at point c and then decreases again to 60percent at point d. Note that the power requirement at both points a andd is 60 percent. At point a, that requirement is supplied byenergization of steps 1-6 in the boiler control. At point (1 this samerequirement is supplied by step 1 and steps 640. This unique capabilityof the present invention as explained above results from equalization ofthe load by the firston, first-off feature of operation.

The foreqoing represents the principle features of the operationalaspects of the present invention. Other important features are, however,included. Note first the current limit determining circuit 20. Thecurrent limiting circuit 20 is a further unique and important feature ofthis invention. The current limiting circuit 20 operates to compare asignal from some internal or external current limit adjustment with theDC. signal from the current feedback circuit 14. When the feedbackcurrent approaches the predetermined limit the. current limiting circuitoverrides the error comparator and forces the signal on output 16a tothe off state. This prevents further increase of power since no furtherpulses can be generated by pulse gate and driver 22 so that shiftregister 24 cannot advance. When the feedback current exceeds the limit,the current limiting circuit 20 sends a signal forcing the signal onoutput line 16 b of the error comparator 16 to the ON state. That causesa reduction in power since pulses from pulse and gate driver 26 operateto advance shift register 28 and deenergize heating elements. Thuswithin its initial range of operation, the current limiting circuitmerely stops further increases in power. Should excessive powergeneration occur, the current limiting circuit automatically counteractsthe excessive power by reducing the number of energized loads.

Another important feature of this invention is the recycle or start-upcircuit 32 shown in detail in FIG. 1B. Basically, this circuit presetsthe shift registers 24 and 28 to a known state when power is appliedafter power has been temporarily interrupted. The recycle circuit 32senses an interruption in power and, if the interruption is greaterthan, for example, 5 cycles the shift registers are automaticallycleared. This is accomplished by generating an output signal on line 32awhich is connected to the CLEAR input terminal of shift registers 24,28. When power is restored, the shift registers are energized at a slow,controlled rate until power is restored to the required level existingprior to the interruption.

FIGS. lA-lD are somewhat more detailed schematic diagrams of theelements shown in the block diagram of FIG. 1. Conventional symbols areused throughout these schematic diagrams and the actual circuitsthemselves can be readily understood by reference to these schematicdiagrams. A few brief explanatory comments are appropriate however.

Current limit determining circuit 20 has an unlabeled input 21 which isadapted to receive an external input signal indicative of apredetermined load limit. The upper portion of this circuit operates toprevent further increase in power and the lower half to institutereduction in power when the load limit indicated at input terminal 21has been reached.

The timing and zero cross circuit 30 is used to control the timing ofpulses generated by the pulse gate and driver circuits 22, 26. In thisfashion energization and de-energization of heating elements isappropriately timed in respect to the A.C. input. The A.C. input is fedto terminals 31, 33 and constitutes two 60 hz. A.C. signals, degrees outof phase. These A.C. signals are then single wave rectified by diodes31a, 33a so as to produce what is essentially full wave rectified,unfiltered D.C. Since this signal goes to zero volts each time the inputA.C. crosses zero it can ultimately be used to trigger a one-shotcircuit 35 to generate pules of a desired width at each zero cross.

In order to avoid erroneous attempts to increase or decrease power whenthe system is at full power or zero power there are diode AND gates 52,54 connected to the outputs of the exclusive OR gates 39 as shown inFIG. 1C. If all heating elements are energized there will be an outputfrom each of the exclusive OR gates 39a-39h. A diode AND gate composedof diodes 52a-52h senses this condition and feeds an appropriate signalvia line 22b to prevent further pulses from being generated by the pulsegate and driver circuit 22.

Similarly, if none of the heating elements are energized there will beno output signal from any of the exclusive OR gates 39a-39h. Thiscondition is detected 7 a by. a second diode AND gate composed of diodes54a-54h which operate to generate a signal via line 24b referencenumeral 39. It will of course be understood that any type of logicvsystem, positive or negative, could suffice equally well in performingthe functions described with respect to the preferred embodiment.

While the preferred embodiment of the invention has been illustrated anddescribed, it should beobvious that modifications andaltneratives willbecome apparent one skilled in. the art withoutdeparting frorirj'theprinciples of the invention. For example, by the simple addition ofadditional up" and down shift registers, the number of steps or loadsbrought into the first-on first-off operation can be increased.Accordingly, the invention is not to be limited to the particular formdescribed, but rather only by the literal interpretation of the claimsappended hereto.

The embodiments of the invention in which an exclusivi; property orprivilege is claimed are defined as follows:

1. A control for varying loads in response to a change in anenvironmental variable comprising:

means for sensing a change in the environmental variable;

a plurality of loads for changing'the environmental variable, and

progressive sequencing means responsive to said sensing means forautomatically selectively energizing and de-energizing said loads in thefollowing order: the load energized the longest since it was lastenergized of the plurality of loads energized at any particular instantis the first to be de-energized and the load de-energized the longestsince it was last de-energi'zed of the plurality of loads deenergized atany particular instant is the first to be re-energized; whereby theenergization period of the loads will be substantially-equallydistributed among all the loads to the maximum extent as demanded bytheenvironmental variable.

2. The control of claim 1, said progressive sequencing means including adown-shift register and an upshift register each operative to advance apulse along output terminals thereof in direct response to a respectiveincrease or decrease in the value of the environmental variable, gatemeans responsive to pulses from said upshift. register for sequentiallyenergizing successive loads and responsive to corresponding pulses fromsaid down-shift register to sequentially de-energize said successiveloads whereby the loadswill be de-energized in the same order as theywere energized.

3. The control of claim 2, said gate means including a series ofexclusive OR-gates, each having inputs coupled respectively to one of aplurality of outputs of each shift register, the outputs of said shiftregisters being se- 1 quentially coupled to successive exclusiveOR-gates so that advancement of pulses through said shift registers ventenergization of additional loads when the actual power being deliveredapproaches the predetermined power limit.

1. A control for varying loads in response to a change in anenvironmental variable comprising: means for sensing a change in theenvironmental variable; a plurality of loads for changing theenvironmental variable, and progressive sequencing means responsive tosaid sensing means for automatically selectively energizing andde-energizing said loads in the following order: the load energized thelongest since it was last energized of the plurality of loads energizedat any particular instant is the first to be de-energized and the loadde-energized the longest since it was last deenergized of the pluralityof loads de-energized at any particular instant is the first to bere-energized; Whereby the energization period of the loads will besubstantially equally distributed among all the loads to the maximumextent as demanded by the environmental variable.
 2. The control ofclaim 1, said progressive sequencing means including a down-shiftregister and an upshift register each operative to advance a pulse alongoutput terminals thereof in direct response to a respective increase ordecrease in the value of the environmental variable, gate meansresponsive to pulses from said up-shift register for sequentiallyenergizing successive loads and responsive to corresponding pulses fromsaid down-shift register to sequentially de-energize said successiveloads whereby the loads will be de-energized in the same order as theywere energized.
 3. The control of claim 2, said gate means including aseries of exclusive OR-gates, each having inputs coupled respectively toone of a plurality of outputs of each shift register, the outputs ofsaid shift registers being sequentially coupled to successive exclusiveOR-gates so that advancement of pulses through said shift registersresults in successive energization and de-energization of said exclusiveOR-gates.
 4. The control of claim 1 further comprising: power sensingmeans for sensing the actual power being delivered to said plurality ofloads, limit establishing means for setting a predetermined power limit,and limit determining means operatively connected to said power sensingmeans and said limit establishing means, said limit determining meansbeing operative to compare the actual power being delivered with thepredetermined power limit and prevent energization of additional loadswhen the actual power being delivered approaches the predetermined powerlimit.